guarda il template che ti ho postato il primo giorno
>DRAM Timing Control--------------------------
CAS# Latency [6]
RAS# to CAS# Delay [7]
RAS# PRE Time [6]
RAS# ACT Time [24]
RAS# to RAS# Delay [AUTO]
REF Cycle Time [24]
WRITE Recovery Time [AUTO]
READ to PRE Time [AUTO]
FOUR ACT WIN Time [AUTO]
Back-To-BackCAS# Delay [Auto]
Timing Mode [1N]
Round Trip Latency on CHA [AUTO]
Round Trip Latency on CHB [AUTO]
Round Trip Latency on CHC [AUTO]
WRITE To READ Delay(DD) 8 [Auto]
WRITE To READ Delay(DR) 8 [Auto]
WRITE To READ Delay(SR) 18 [Auto]
READ To WRITE Delay(DD) 7 [Auto]
READ To WRITE Delay(DR) 7 [Auto]
READ To WRITE Delay(SR) 7 [Auto]
READ To READ Delay(DD) 7 [Auto]
READ To READ Delay(DR) 6 [Auto]
READ To READ Delay(SR) 4 [Auto]
WRITE To WRITE Delay(DD) 8 [Auto]
WRITE To WRITE Delay(DR) 8 [Auto]
WRITE To WRITE Delay(SR) 18 [Auto]